Title

Generating High Coverage Tests for SystemC Designs Using Symbolic Execution

Published In

Design Automation Conference (ASP-DAC), 2016 21st Asia and South Pacific

Document Type

Citation

Publication Date

3-10-2016

Abstract

SystemC is a system-level modeling language increasingly adopted by the semiconductor industry. Quality assurance for SystemC designs is important, since undetected errors may propagate to final silicon implementations and become very costly to fix. The errors, if not fixed, can cause major damage and even endanger lives. However, quality assurance for SystemC designs is very challenging due to their object-oriented nature, event-driven simulation semantics, and inherent concurrency. In this research, we have developed an approach to generating high coverage tests for SystemC designs using symbolic execution. We have applied this approach to a representative set of SystemC designs. The results show that our approach is able to generate tests that provide high code coverage of the designs with modest time and memory usage. Furthermore, the experiment on a RISC CPU design with more than 2K lines of SystemC code demonstrates that our approach scales to designs of practical sizes.

DOI

10.1109/ASPDAC.2016.7428006

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