Quantum theory, Quantum computers -- Testing, Logic circuits -- Design and construction
We address the problem of quantum test set generation using measurement from a single basis and the single fault model. Experimental physicists currently test quantum circuits exhaustively, meaning that each n-bit permutative circuit requires ζ x 2n tests to assure functionality, and for an m stage permutative circuit proven not to function properly the current method requires ζ x 2n x m tests as the upper bound for fault localization, where zeta varies with physical implementation. Indeed, the exhaustive methods complexity grows exponentially with the number of qubits, proportionally to the number of stages in a quantum circuit and directly with zeta. This testability bound grows still exponentially with the attempted verification of quantum effects, such as the emission of a quantum source. The exhaustive method will soon not be feasible for practical application provided the number of qubits increases even a small number from the current state of the art. An algorithm is presented making fault detection feasible both now and in the foreseeable future for quantum circuits. The presented method attempts the quantum role of classical test generation and test set reduction methods known from standard binary and analog circuits. The quantum fault table is introduced, and the test generation method explained, we show that all faults can be detected that impact calculations from the computational basis. It is believed that this fundamental research will lead to the simplification of testing for commercial quantum computers.
Perkowski, Marek and Biamonte, Jacob D., "Testing a Quantum Computer" (2004). Electrical and Computer Engineering Faculty Publications and Presentations. 222.