Published In

Proceedings of the 6th International Symposium on Representation and Methodology of Future Computing Technology

Document Type

Conference Proceeding

Publication Date

2003

Subjects

Reversable Logic, Reversable computing, Logic Synthesis

Abstract

Reversible circuits are currently on of top approaches to power minimization and the one whose importance will be only growing with time. In this paper, the well known Feynman gate is generalized to k*k gate and a new generalized k*k family of reversible gates is proposed. A synthesis method for multi-output SOP function using cascades of the new gate family is presented. For utilizing the benefit of product sharing among the output functions, two graph-based data structures are used. Another synthesis method for AND-OR-EXOR function using cascades of the new gate family and generalized Feynman gate is also presented. Synthesis method for single-output ESOP function using cascades of the new gate family is also presented. All these synthesis methods are technology independent and generate very few garbage outputs and need few input constants.

Description

This is the author's version of a paper which was subsequently published in Proceedings Of the 6th International Symposium on Representation and Methodology of Future Computing Technology (RM 2003), Trier, Germany (pp. 10-11).

Persistent Identifier

http://archives.pdx.edu/ds/psu/13105

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