Delay and Yield of CNFET-Based Circuits in the Presence of Variations
Published In
2015 IEEE Nanotechnology Materials and Devices Conference (NMDC)
Document Type
Citation
Publication Date
9-2015
Abstract
The aggressive scaling of CMOS circuits is approaching the atomic and quantum physical limits [1], and therefore extensive research is being conducted on devices made with III-V and II-VI semiconductors, and with more exotic materials like grapheme, and various nanotubes.
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DOI
10.1109/NMDC.2015.7439255
Persistent Identifier
http://archives.pdx.edu/ds/psu/19204
Citation Details
M. Chrzanowska-Jeske, "Delay and yield of CNFET-based circuits in the presence of variations," 2015 IEEE Nanotechnology Materials and Devices Conference (NMDC), Anchorage, AK, USA, 2015, pp. 1-2.