Approximate In-Memory Hamming Distance Calculation With a Memristive Associative Memory
This work was supported by the National Science Foundation (NSF) under award # 1028378 and by the Defense Advanced Research Projects Agency (DARPA) under award # HR0011-13-2-0015.
Nanoscale Architectures (NANOARCH), 2016 IEEE/ACM International Symposium on
Pattern matching algorithms, which may be realized via associative memories, require further improvements in both accuracy and power consumption to achieve more widespread use in real-world applications. In this work we utilized a memristive crossbar to combine computation and memory in an approximate Hamming distance computing architecture for an associative memory. For classifying handwritten digits from the MNIST data-set, we showed that using the Hamming distance rather than the traditional dot product increased accuracy, and decreased power consumption by 100×. Moreover, we showed that we can trade-off accuracy to save additional power or vice-versa by adjusting the input voltage. This trade-off may be adjusted for the architecture depending on its application. Our architecture consumed 200× less power than other previously proposed Hamming distance associative memory architectures, due to the use of memristive devices, and is 256× faster than prior work due to our leveraging of in-memory computation. Improved associative memories should prove useful for GPUs, handwriting recognition, DNA sequence matching, object detection, and other applications.
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M. M. A. Taha, W. Woods and C. Teuscher, "Approximate in-memory Hamming distance calculation with a memristive associative memory," 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Beijing, 2016, pp. 159-164.