Multi-input Volistor Logic XNOR Gates
Sponsor
This work was supported in part by the Higher Committee for Education Development in Iraq (HCED Iraq) under grant D11000949.
Published In
International Journal of Parallel, Emergent and Distributed Systems
Document Type
Citation
Publication Date
7-2019
Abstract
A novel approach utilising the emerging memristor technology is introduced for realising a 2-input primitive XNOR gate. This gate enables in-memory computing and is used as a building block of multi-input XNOR gates. The XNOR gate is realised with eight memristors of two crossbar arrays. The average power consumption of an 8-input XNOR gate is calculated and compared with its counterpart realised with CMOS technology – the XNOR gate consumes less power. ESOP realisation can be directly implemented with XNOR gates. Our simulation results and comparisons show the benefit of the proposed XNOR gate in terms of delay, area, and power.
Volistor logic XNOR gate. (a) Circuit diagram of two-input volistor logic XNOR gate. Input voltages are applied to memristors S1 and S2 through horizontal wires Win1 and Win2, and the output which is logical AND of states S1 and S2 is calculated by applying VREAD to vertical wire WXNOR. (b) Block diagram of two-input volistor logic gate. (c) A multi-input volistor logic XNOR gate can be implemented by connecting two XNOR gates though CMOS switches.
Locate the Document
DOI
10.1080/17445760.2019.1649403
Persistent Identifier
https://archives.pdx.edu/ds/psu/29348
Citation Details
Aljafar, M. J., Perkowski, M. A., & Acken, J. M. (2019). Multi-input volistor logic XNOR gates. International Journal of Parallel, Emergent and Distributed Systems, 1-10.
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