Fault Coverage Analysis Using Sneak Path Based Testing in Memristor Circuits
2022 IEEE 31st Microelectronics Design & Test Symposium (MDTS)
Testing memristor crossbar arrays is required to ensure high quality. However, inefficient testing can be prohibitively expensive. To evaluate the quality and efficiency of a test requires identifying the underlying relationship between fault coverage and test time as measured by faults detected per added test vector. This work describes a test methodology that utilizes sneak paths for efficient test generation. This work further describes the relationship between added test vectors and improved fault coverage for the efficient test generation methodology.
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Joshi, R., & Acken, J. M. (2022, May). Fault Coverage Analysis using Sneak Path based Testing in Memristor Circuits. In 2022 IEEE 31st Microelectronics Design & Test Symposium (MDTS) (pp. 1-6). IEEE.