Rs3dplace: Monolithic 3D IC Placement Using Reinforcement Learning and Simulated Annealing

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2022 IEEE International Symposium on Circuits and Systems (ISCAS)

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We propose a novel Reinforcement Learning (RL) and Simulated Annealing (SA)-based placement algorithm (RS3DPlace), which, to the best of our knowledge, is the first machine learning approach for Monolithic 3D ICs (M3D). Application of Machine Learning to physical design of 2D and 3D VLSI ICs is an emerging area. Recently proposed learning algorithms for the placement problem consider only 2D ICs and still exhibit memory issues and learning problems in large search spaces. RS3DPlace uses the learning ability of RL to quickly estimate a preliminary solution, which SA later uses to generate an improved final solution. To address memory issues, RS3DPlace uses the approximate method for state representation which reduces the memory complexity and allows more than one kind of perturbation to improve learning efficiency in large search spaces. The current implementation is for the gate-level M3D design style, but it can be extended to other M3D design styles and other 2D and 3D physical design optimization problems. To illustrate the effectiveness of RS3DPlace, we tested it for 8-128-bit MUX-based right arithmetic shifter circuits and a circuit with non-regular connections compared to Mux-based shifters, which are optimized in 2-layered M3D technology. The experimental results show that RS3DPlace solves the M3D placement of 896 variables. Experimental results also show on average 16% improvement in overall cost function in comparison to Random Initialized SA (RandSA).


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