Concolic Testing of SystemC Designs
This research received financial support from National Science Foundation (Grant #: CNS-1422067).
2018 19th International Symposium on Quality Electronic Design (ISQED)
SystemC is a system-level modelling language widely used in the semiconductor industry. SystemC validation is both necessary and important, since undetected bugs may propagate to final silicon products, which can be extremely expensive and dangerous. However, it is challenging to validate SystemC designs due to their heavy usage of object-oriented features, event-driven simulation semantics, and inherent concurrency. In this paper, we present CTSC, an automated, easyto- deploy, scalable, and effective binary-level concolic testing framework for SystemC designs. We have implemented CTSC and applied it to an open source SystemC benchmark. In our extensive experiments, the CTSC-generated test cases achieved high code coverage, triggered 14 assertions, and found two severe bugs. In addition, the experiments on two designs with more than 2K lines of SystemC code show that our approach scales to designs of practical sizes.
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Lin, B., Cong, K., Yang, Z., Liao, Z., Zhan, T., Havlicek, C., & Xie, F. (2018, March). Concolic testing of SystemC designs. In 2018 19th International Symposium on Quality Electronic Design (ISQED) (pp. 1-7). IEEE.