First Advisor

Jack C. Riley

Term of Graduation

Summer 1977

Date of Publication

7-29-1977

Document Type

Thesis

Degree Name

Master of Science (M.S.) in Applied Science

Department

Applied Science

Language

English

Subjects

Error-correcting codes (Information theory), Electronic digital computers, Computers

DOI

10.15760/etd.2525

Physical Description

1 online resource (56 pages)

Abstract

Today’s digital communication systems perform data transfers at the rate of millions of bits per minute, with data errors in the order of 1/6th error per day. This magnitude of errorless communication is now possible because of sophisticated error correcting codes. Many types of error codes are employed today in three distinct areas of digital data communication: human to computer; data source to computer; computer to computer; and intra-computer; we are concerned here with intra-computer communication.

This research is primarily a mathematical study of error codes in general to explore the possibilities of each major type for the purpose of implementation in real systems. The author was inspired toward this goal by several people and self-feelings.

The first, was a definite affinity toward orderliness and the logical sequence of formal mathematics. Secondly, the thrusting of being assigned to a work project where computer maintenance and where all types of errors became important. And, finally an advisor who believes in "practical things". The original portion of this endeavor is to be found in the conclusions drawn from each group of mathematical facts disclosed in the research. The particular bend of the author toward the cost/reliability/efficiency of the system was not the intent of the theoretical mathematicians who did the majority of the work quoted herein. The author's contribution was to draw these ideas and works together and to form the conclusions based upon his experience and training as an Engineer.

The primary conclusion is that multi-residue systematic codes appear to be the best choice for implementation of all around error correction and general hardware configurations. This conclusion is within the constraints that were laid down in the introduction of the research; 1) to not increase the cost of hardware, 2) to maintain or improve the system reliability, and 3) to maintain or increase the processing speed.

Rights

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Comments

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Persistent Identifier

https://archives.pdx.edu/ds/psu/16061

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