Portland State University. Department of Electrical Engineering
Date of Publication
Master of Science (M.S.) in Electrical and Computer Engineering
Metal oxide semiconductor field-effect transistors -- Design and construction, Silicon -- Electronic properties -- Computer simulation, Metal oxide semiconductors -- Computer simulation
1 online resource (2, iv, 89 p.)
With increasing demand for complex and faster circuits, CMOS technologies are progressing towards the deep-submicron level. Process complexity increases dramatically, and costly techniques are to be developed to create dense field isolation and shallow junctions. Silicon-On-Insulator (SOI) may solve some of these problems. On the other hand, strained Si1-x Gex layers have been successfully grown on Si substrates and demonstrated much higher hole mobility than bulk Si. This can be used to build high-mobility p-MOSFET with a buried Si1-x Gex channel. A high mobility p-MOSFET would improve both the circuit speed and the level of integration. The purpose of the present study was to model and simulate the effective mobility (μeff) of SOI Si1-x Gex p-MOSFET, and to investigate the suitability of local mobility models provided by simulator MEDICI for studying SOI Si1-x Gex p-MOSFET. The simulation is performed by using the two-dimensional device simulation program (MEDICI). The design parameters, such as Si-cap thickness, Ge profile and back-gate bias, were also investigated. A long channel (6μ) and a short channel (0.25μ) SOI and bulk Si1-x Gex p MOSFET were used for the study. Simulation reveals good effective mobility μeff match with experimental results if SiGe channel of p-MOSFET can simply be treated like a bulk silicon with mobility 250cm2/Vs. Mobility models provided by MEDICI are two types: a) mobility model (SRFMOB2) that is dependent on transverse electric field only at Si/ SiO2 interface, which means that the effective mobility is a function of grid spacing at Si/ SiO2 interface, and b) mobility models (PRPMOB, LSMMOB and HPMOB) that are dependent on transverse electric field anywhere in the device. PRPMOB and LSMMOB produce very good μef f and are insensitive to the grid spacing. HP MOB gives slight over estimation of effective mobility μeff. Silicon cap thickness can significantly influence the effective mobility μeff. In general, the thin silicon cap have better effective mobility μeff, but it is limited by manufacturing process. Graded Si1-xGex channel presents nearly 100% improvement of effective mobility μeff for p-MOSFET over its bulk counterpart. This improvement is sustained up to gate voltage of 2.5 V. Simulation also indicates that large improvement of effective mobility μeff requires higher Ge concentration at the top of SiGe channel with steep grading. The influence of back-gate bias on μeff is small, hence, SOI SiGe MOSFET is well suited to building CMOS circuits.
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Zhou, Sida, "Mobility Modeling and Simulation of SOI Si1-x Gex p-MOSFET" (1995). Dissertations and Theses. Paper 4954.