First Advisor

Marek Perkowski

Term of Graduation

Spring 2022

Date of Publication

6-2-2022

Document Type

Dissertation

Degree Name

Doctor of Philosophy (Ph.D.) in Electrical and Computer Engineering

Department

Electrical and Computer Engineering

Language

English

DOI

10.15760/etd.7917

Physical Description

1 online resource (xix, 372 pages)

Abstract

This dissertation presents a novel design of a hardware classifier based on combining modified Ashenhurst-Curtis Decomposition and multiplexer-based synthesis. The PSUD classifier brings three new contributions: an approach to solve the column multiplicity problem, an approach to encode multiple-valued variables, and a decomposition algorithm based on modified Ashenhurst-Curtis Decomposition. One of the biggest challenges in Boolean function decomposition is the variable partitioning problem. Thus, we introduce a new representation of two combined classifiers for multiple-valued functions to overcome the variable partitioning problem which allows finding the minimal column multiplicity and consequently to find high quality decompositions leading to a good learning accuracy. Another aspect of our approach is that the trained classifier is a Boolean network realized in an FPGA which allows for fast object recognition by a robot. The classifier gives very good accuracy results when tested on multi-valued Machine Learning benchmarks from the UC Irvine repository.

Rights

In Copyright. URI: http://rightsstatements.org/vocab/InC/1.0/ This Item is protected by copyright and/or related rights. You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s).

Persistent Identifier

https://archives.pdx.edu/ds/psu/38060

Available for download on Sunday, June 02, 2024

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