Efficient Implementation of Image Compression-Postprocessing Algorithm Using a Digital Signal Processor
Portland State University. Department of Electrical Engineering
Term of Graduation
Date of Publication
Master of Science (M.S.) in Electrical and Computer Engineering
Image compression, Image processing -- Digital techniques, Data compression (Telecommunication), Signal processing -- Digital techniques, Algorithms
1 online resource (91 pages)
In this thesis, an attempt has been made to develop a fast way to implement a post-processing algorithm for image compression. All the previous tests for this postprocessing algorithm, which we will present, have been only software based and did not consider the time parameter.
For this purpose a new algorithm is used to compute the 2-D DCT transform. This change made the process a lot faster on a Spare 5 workstation. We have then decided to further increase the speed of the post-processing scheme by implementing it on the ADSP21020 chip.
The results show that such a chip can achieve a speed increase and that ifthe code is optimized a faster processing is even reachable.
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Sinaceur, Nadir, "Efficient Implementation of Image Compression-Postprocessing Algorithm Using a Digital Signal Processor" (1997). Dissertations and Theses. Paper 6376.
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