Document Type
Pre-Print
Publication Date
2014
Subjects
Quantum computing, Logic circuits -- Design and construction, Quantum electronics
Abstract
This paper presents a heuristic cost minimization approach to synthesizing linear reversible circuits. Two bidirectional linear reversible circuit synthesis methods are introduced, the Alternating Elimination with Cost Minimization method (AECM) and the Multiple CNOT Gate method (MCG). Algorithms, example syntheses, and extensions to these methods are presented. An MCG variant which incorporates line reordering is introduced. Tests comparing the new cost minimization methods with the best known method for large circuits are presented. Results show that of the three methods MCG had the lowest average CNOT gate counts for linear reversible circuits up to 24 lines, and that AECM had the lowest counts between 28 and 60 lines.
Persistent Identifier
http://archives.pdx.edu/ds/psu/12764
Citation Details
Schaeffer, Ben, and Marek Perkowski. "A Cost Minimization Approach to Synthesis of Linear Reversible Circuits." arXiv preprint arXiv:1407.0070 (2014).