Published In

International Workshop on Logic Synthesis

Document Type

Conference Proceeding

Publication Date

2001

Subjects

Reversable Logic, Reversable computing, Logic Synthesis

Abstract

We introduce a Reversible Programmable Gate Array (RPGA) based on regular structure to realize binary functions in reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. In addition, it realizes many non-symmetric functions even without variable repetition. Our synthesis method to RPGAs allows to realize arbitrary symmetric function in a completely regular structure of reversible gates with smaller “garbage” than the previously presented papers. Because every Boolean function is symmetrizable by repeating input variables, our method is applicable to arbitrary multi-input, multi-output Boolean functions and realizes such arbitrary function in a circuit with a relatively small number of garbage gate outputs. The method can be also used in classical logic. Its advantages in terms of numbers of gates and inputs/outputs are especially seen for symmetric or incompletely specified functions with many outputs.

Description

This is the author's version of a paper which was subsequently published in International Workshop on Logic Synthesis. 2001.

Persistent Identifier

http://archives.pdx.edu/ds/psu/13104

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