Sponsor
This work was supported by the Agency for Innovation by Science and Technology (Agentschap voor Innovative door Wetenschap en Technologie – IWT, Flanders, Belgium) through project INVENT (Integrated voltage regulator using novel topologies and devices), project number 58686-2012.
Published In
International Convention on Information and Communication Technology, Electronics and Microelectronics
Document Type
Conference Proceeding
Publication Date
5-1-2014
Abstract
This paper presents the system for the evaluation of operation of a depletion-mode silicon carbide (SiC) power junction field-effect transistor (JFET). The main part of the system is a dc-dc step-down converter which represents realistic operating conditions for the switching devices in a synchronous buck configuration. In order to test the importance of the dead-time value on the operation and efficiency of the synchronous buck converter, a precise two-channel time-delay pulse signal generator is developed and its operation is described. The ability to precisely regulate control signal parameters of the high-side FET and low-side FET (switching voltage and current, operating frequency, duty cycle, dead-times, etc.) is needed in order to fully characterise SiC power switches. The functionality of the complete system is verified by measurements performed under various operating conditions.
Rights
Copyright 2014 the author(s).
DOI
10.1109/MIPRO.2014.6859547
Persistent Identifier
https://archives.pdx.edu/ds/psu/25863
Citation Details
Bacmaga, J., Bene, K., Pejcinovic, B., & Baric, A. (2014, May). Evaluation of the operation of depletion-mode SiC power JFET in DC-DC converter applications. In 2014 37th International Convention on Information and Communication Technology, Electronics and Microelectronics (MIPRO) (pp. 130-135). IEEE.