Sponsor
Portland State University. Department of Electrical and Computer Engineering
First Advisor
Dan Hammerstrom
Date of Publication
1-1-2011
Document Type
Thesis
Degree Name
Master of Science (M.S.) in Electrical and Computer Engineering
Department
Electrical and Computer Engineering
Language
English
Subjects
Biologically-inspired computing, Field programmable gate arrays, Computer input-output equipment --Evaluation
DOI
10.15760/etd.160
Physical Description
1 online resource (ix, 90 p.)
Abstract
In recent years there has been significant research in the field of computational neuroscience and many of these biologically inspired cognitive models are based on the theory of operation of mammalian visual cortex. One such model of neocortex developed by George & Hawkins, known as Hierarchical Temporal Memories (HTM), is considered for the research discussed here. We propose a simple hierarchical model that is derived from HTM. The aim of this work is to evaluate the hardware cost and performance against software based simulations. This work presents a detailed hardware implementation and analysis of the derived hierarchical model. We show that these networks are inherently parallel in their architecture, similar to the biological computing, and that parallelism can be exploited by massively parallel architectures implemented using reconfigurable devices such as the FPGA. Hardware implementation accelerates the learning process which is useful in many real world problems. We have implemented a complex network node that operates in real time using an FPGA. The current architecture is modular and allows us to estimate the hardware resources and computational units required to realize large scale networks in the future.
Rights
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Persistent Identifier
http://archives.pdx.edu/ds/psu/6959
Recommended Citation
Deshpande, Mandar, "FPGA Implementation and Acceleration of Building blocks for Biologically Inspired Computational Models" (2011). Dissertations and Theses. Paper 160.
https://doi.org/10.15760/etd.160
Comments
Portland State University. Dept. of Electrical and Computer Engineering