Portland State University. Department of Electrical Engineering
Date of Publication
Master of Science (M.S.) in Electrical Engineering
Parallel processing (Electronic computers), Computer architecture, Matrices -- Data processing, Algorithms
1 online resource (269 p.)
In this thesis, we propose a new systolic architecture which is based on the Faddeev's algorithm. Because Faddeev's algorithm is inherently general purpose, our architecture is able to perform a wide class of matrix computations. And since the architecture is systolic based, it brings massive parallelism to all of its computations. As a result, many matrix operations including addition, multiplication, inversion, LU-decomposition, transpose, and solutions to linear systems of equations can now be performed extremely fast. In addition, our design introduces several concepts which are new to systolic architectures:
- It can be re-configured during run time to perform different functions with the uses of various control signals propagating throughout the arrays.
- It allows for maximum overlaps of processing between consecutive computations, thereby increasing system throughput.
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Le, Hai Van Dinh, "A new general purpose systolic array for matrix computations" (1988). Dissertations and Theses. Paper 3796.