First Advisor

W. Robert Daasch

Term of Graduation

Fall 1988

Date of Publication

12-5-1988

Document Type

Thesis

Degree Name

Master of Science (M.S.) in Electrical Engineering

Department

Electrical Engineering

Language

English

Subjects

Complementary metal oxide semiconductors, Transistor circuits

DOI

10.15760/etd.5689

Physical Description

1 online resource (2, viii, 96 pages)

Abstract

This study uses differential pass transistor methodology for implementing and evaluating Boolean functions. The main goal is investigation of CMOS and nMOS approaches in pass transistor logic design. Pass-transistor logic is most effective in the implementation of Boolean functions when the vectors are in the same format. It has been demonstrated that nMOS pass transistor logic driven by a control signal voltage above the Vdd level offers a significant improvement in speed. nMOS pass transistorsalso offer less area consumption in comparison to the CMOS approach.

The philosophy developed here has been used in the design of a program for the layout generation of pass transistor networks. This program has been applied to the design of a 4-to-1 multiplexer and an adder (sum and carry). The layout of the circuit sub-cell have been done using the program Magic, based on 3μ CMOS p-well technology.

Rights

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Comments

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Persistent Identifier

http://archives.pdx.edu/ds/psu/21273

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