Sponsor
Portland State University. Department of Electrical Engineering
First Advisor
Marek A. Perkowski
Term of Graduation
Spring 1989
Date of Publication
4-3-1989
Document Type
Thesis
Degree Name
Master of Science (M.S.) in Electrical and Computer Engineering
Department
Electrical Engineering
Language
English
Subjects
Sequential machine theory
DOI
10.15760/etd.5796
Physical Description
1 online resource (2, viii, 117 pages)
Abstract
This thesis presents a Finite State Machine (FSM) Synthesizer developed at Portland State University. The synthesizer starts from a high level behavioral description, in which no states are specified, and generates the lower level FSM descriptions for simulation and physical layout generation.
Rights
In Copyright. URI: http://rightsstatements.org/vocab/InC/1.0/ This Item is protected by copyright and/or related rights. You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s).
Persistent Identifier
https://archives.pdx.edu/ds/psu/21971
Recommended Citation
Liu, Jiuling, "A Finite State Machine Synthesizer" (1989). Dissertations and Theses. Paper 3912.
https://doi.org/10.15760/etd.5796
Comments
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