First Advisor

Hormoz Zarefar

Term of Graduation

Summer 1990

Date of Publication

9-4-1990

Document Type

Thesis

Degree Name

Master of Science (M.S.) in Mechanical Engineering

Department

Mechanical Engineering

Language

English

Subjects

Semiconductors -- Thermal properties, Thermal stresses

DOI

10.15760/etd.6099

Physical Description

1 online resource (2, ix, 46 pages)

Abstract

The failure of integrated circuit due to Silicon fracture is one of the problems associated with the production of a semiconductor device. The thermal stresses, which result in die cracking, are for the most part induced during the cooling process after attaching the die with Gold-Silicon solder. Major factors for stress generation in material systems are commonly large temperature gradients and substantial difference in coefficients of thermal expansion.

This research covers the thermal stresses introduced upon cooling a composite Silicon device. A transient thermal analysis has been performed to determine the temperature gradients. The stress distribution has been investigated. For both analyses the Finite Element Method has been applied. Various parameters such as center and edge voids as well as varying thickness of the Eutectic layer have been taken into account.

The magnitude of the induced stresses was found to increase with increasing thickness of the eutectic layer. Center voids induce a new area of high stresses which can exceed the stresses at the edge of the device. Edge voids change the stress distribution and increase the tensile stresses in the top surface of the device. Thermal stresses due· to nonuniform cooling of the device were found to be insignificant. The probability of die cracking depends mainly on the magnitude of the residual stresses and on the quality of the surfaces and edges of the die.

Rights

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Comments

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Persistent Identifier

https://archives.pdx.edu/ds/psu/24352

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