Sponsor
Portland State University. Department of Electrical Engineering
First Advisor
Marek Perkowski
Date of Publication
1994
Document Type
Dissertation
Degree Name
Doctor of Philosophy (Ph.D.) in Electrical and Computer Engineering
Department
Electrical Engineering
Language
English
Subjects
Field programmable gate arrays, Logic design -- Testing, Programmable logic devices, Cellular automata, Boolean algebra
DOI
10.15760/etd.6638
Physical Description
1 online resource (vii, 192 pages)
Abstract
The new Field Programmable Gate Array (FPGA) technologies and their structures have opened up new approaches to logic design and synthesis. The main feature of an FPGA is an array of logic blocks surrounded by a programmable interconnection structure. Cellular FPGAs are a special class of FPGAs which are distinguished by their fine granularity and their emphasis on local cell interconnects. While these characteristics call for specialized synthesis tools, the availability of logic gates other than Boolean AND, OR and NOT in these architectures opens up new possibilities for synthesis. Among the possible realizations of Boolean functions, XOR logic is shown to be more compact than AND/OR and also highly testable. In this dissertation, the concept of structural regularity and the advantages of XOR logic are used to investigate various synthesis approaches to cellular FPGAs, which up to now have been mostly nonexistent. Universal XOR Canonical Forms, Two-level AND/XOR, restricted factorization, as well as various Directed Acyclic Graph structures are among the proposed approaches. In addition, a new comprehensive methodology for the investigation of all possible XOR canonical forms is introduced. Additionally, a new compact class of XOR-based Decision Diagrams for the representation of Boolean functions, called Kronecker Functional Decision Diagrams (KFDD), is presented. It is shown that for the standard, hard, benchmark examples, KFDDs are on average 35% more compact than Binary Decision Diagrams, with some reductions of up to 75% being observed.
Rights
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Persistent Identifier
https://archives.pdx.edu/ds/psu/27818
Recommended Citation
Sarabi, Andisheh, "Logic Synthesis with High Testability for Cellular Arrays" (1994). Dissertations and Theses. Paper 4752.
https://doi.org/10.15760/etd.6638
Included in
Controls and Control Theory Commons, Electrical and Electronics Commons, Systems and Communications Commons
Comments
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