Sponsor
Portland State University. Department of Electrical and Computer Engineering
First Advisor
John M. Acken
Term of Graduation
Fall 2020
Date of Publication
9-2-2020
Document Type
Dissertation
Degree Name
Doctor of Philosophy (Ph.D.) in Electrical and Computer Engineering
Department
Electrical and Computer Engineering
Language
English
Subjects
Active electric filters, Systems on a chip
DOI
10.15760/etd.7477
Physical Description
1 online resource (x, 103 pages)
Abstract
The manufacturing yield, overkill, and defect level limit the feasibility of analog circuits in SoCs. The conventional method of handling process and environmental variation is to assign a design margin such that the design meets specifications at several processes and environmental corners. However, checking only extreme corners limits performance in comparison to the more rigorous statistical approach of the computing manufacturing and quality figure of merit. The statistical approach requires transistor-level simulation of hundreds or even thousands of samples, not just a few corners, and thus is very time consuming.
This research offers a method for reducing the time required for the statistical approach by characterizing each of the many samples of building blocks once at the transistor level. The building blocks are scalable such that the statistics are preserved when a building block is adjusted to the requirement of a higher-level design. Many design scenarios can be rapidly explored by assembling and scaling the building block samples without SPICE simulation. This study employs a continuous time low-pass filter design example to extract the requirements of the building block approach. The requirements include a method to assemble building blocks (biquad element for the example) into a filter design while preserving the statistics that would have been extracted by simulation of the entire filter at the transistor level. The assembly method for both linear and nonlinear response is proposed.
Rights
In Copyright. URI: http://rightsstatements.org/vocab/InC/1.0/ This Item is protected by copyright and/or related rights. You are free to use this Item in any way that is permitted by the copyright and related rights legislation that applies to your use. For other uses you need to obtain permission from the rights-holder(s).
Persistent Identifier
https://archives.pdx.edu/ds/psu/34453
Recommended Citation
Wang, Yu-Shan, "Analog Statistical Design for Manufacturability" (2020). Dissertations and Theses. Paper 5605.
https://doi.org/10.15760/etd.7477