First Advisor

Marek Perkowski

Term of Graduation

Fall 2000

Date of Publication

2000

Document Type

Thesis

Degree Name

Master of Science (M.S.) in Electrical Engineering

Department

Electrical Engineering

Language

English

Subjects

Computer-aided design, Computer algorithms, VHDL (Computer hardware description language), Garbage collection (Computer science), Algorithms

DOI

10.15760/etd.3627

Physical Description

1 online resource (v, 121 pages)

Abstract

Binary Decision Diagrams (BDDs) are an extremely important data structure used in many logic design, synthesis and verification applications. Symbolic problem representations make BDDs a feasible data structure for use on many problems that have discrete representations. Efficient implementations of BOD algorithms on general purpose computers has made manipulating large binary decision diagrams possible. Much research has gone into making BOD algorithms more efficient on general purpose computers. Despite amazing increases in performance and capacity of such computers over the last decade, they may not be the best way to solve large, specialized problems. A computer architecture designed specifically to execute algorithms on binary decision diagrams has been created here to evaluate the possible performance improvements in BOD manipulation. This specialized computer will be described and its implementation discussed with respect to the important aspects of efficient BDD manipulations. This thesis will demonstrate that significant performance increases are possible using a specialized computer architecture for manipulating binary decision diagrams.

Rights

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Comments

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Persistent Identifier

https://archives.pdx.edu/ds/psu/40774

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