Sponsor
Portland State University. Department of Electrical and Computer Engineering
First Advisor
Josh Méndez
Term of Graduation
Summer 2026
Date of Publication
7-29-2026
Document Type
Thesis
Degree Name
Master of Science (M.S.) in Electrical and Computer Engineering
Department
Electrical and Computer Engineering
Language
English
Subjects
dvb-s2, gnuradio, software defined radio, verilator
Physical Description
1 online resource (viii, 65 pages)
Abstract
In embedded digital radio systems, a central challenge is meeting the real-time throughput required to process the samples--especially for space-bound ultra-wideband SDRs which must handle more than 100 Gbps entirely onboard. An FPGA's programmable logic offers sufficient potential, but realizing a particular radio flow is a project usually fraught with defects and long turnaround times. We simulated Verilog modules in a custom harness that adapted a Verilated model to GNU Radio, which allowed for breaking down a complicated radio flow (here, DVB-S2 modulation) into a series of well-bounded problems each with clear criteria for success. The framework, built on open source tools and itself open source, presents other practitioners with a higher leverage starting point for translating flows of interest to them.
Rights
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Persistent Identifier
https://archives.pdx.edu/ds/psu/45116
Recommended Citation
Pellegrino, Seth, "Improving the FPGA Radio Design Cycle: Implementing DVB-S2 Modulation Using Verilator and GNU Radio" (2026). Dissertations and Theses. Paper 7187.